A semiconductor device, which is formed by mounting a semiconductor chip on a printed wiring board having external connection terminals formed thereon, is used in many cases. Generally, such a printed wiring board is referred to as an interposer or a package substrate. Conventionally, a build-up wiring board is widely used as an interposer. The build-up wring board is a multi-layer wiring board having fine wires formed therein.
In recent years, with miniaturization of a semiconductor chip, a pitch of connection electrodes of the semiconductor chip has become decreased. However, the above-mentioned build-up wiring board has a limitation in a reduction in the size of wirings and a fine-pitch arrangement of connection electrodes. Thus, it has become difficult to mount a fine structure semiconductor chip onto the build-up wiring board. In order to eliminate such a problem, a silicon interposer has been developed. The silicon interposer enables formation of smaller wirings and connection electrodes than that of the build-up wiring board. The silicon interposer is a printed wiring board produced by forming fine wirings on a silicon substrate according to a silicon-fabrication technique. A fine wiring-structure, which is the same as a semiconductor chip formed by a silicon substrate, can be formed on the silicon interposer. The silicon substrate can be planarized further than an organic substrate such as a build-up wiring board. In this respect, it is said that a finer structure can be formed in the silicon interposer.
Furthermore, the silicon interposer has an advantage that there is no problem resulting from a thermal stress due to a mismatch of coefficients of thermal expansion because the silicon interposer is formed by a silicon substrate and the coefficient of thermal expansion of the silicon interposer is equal to the coefficient of thermal expansion of a silicon semiconductor chip, which is also formed by a silicon substrate. However, if a semiconductor device using a silicon interposer is mounted on a motherboard formed by an organic substrate, such as a build-up wiring board, a problem may occur due to a mismatch in coefficients of thermal expansion between the silicon interposer and the organic substrate of the motherboard. Especially, in a case of using a silicon interposer as large as more than 20 mm square size, a thermal stress due to a mismatch in coefficients of thermal expansion between the silicon interposer and the organic substrate, which may result in a failure in a temperature cycle test for determining a reliability of a connection between the silicon interposer and the organic substrate.
Here, Japanese Laid-Open Patent Application No. 3-105954 suggests forming an interposer by a material having a coefficient of thermal expansion between that of a semiconductor chip and that of an organic substrate in order to reduce a mismatch in coefficients of thermal expansion between the semiconductor chip, the interposer and the organic substrate.
According to the technique disclosed in the above-mentioned patent document, an interposer must be formed using a special material other than silicon in order to mount a semiconductor chip using a silicon substrate. Thus, a silicon interposer is not used in the technique disclosed in the above-mentioned patent document. An interposer of a material other than silicon is not generally used, and it is difficult to produce such an interposer and a manufacturing cost thereof is high.
Even if an interposer is formed by a material having a coefficient of thermal expansion between a semiconductor chip and an organic substrate, there still is a mismatch in the coefficient of thermal expansions between the interposer and the semiconductor chip and between the interposer and the organic substrate. Thus, there may be a problem caused by a thermal stress due to the mismatch in the coefficients of thermal expansion.
Moreover, because the silicon interposer is formed using a silicon substrate such as a silicon wafer, a number of silicon interposers, which can be formed in a single sheet of silicon wafer, is limited by a circular shape of the silicon wafer. For example, the maximum work size of an organic substrate, which can be handled presently, is a quadrangle form of 350 mm×510 mm, while the maximum work size of a silicon wafer, which can be handled and processed presently, is a circular form of 300 mm in diameter. If the silicon wafer having a diameter of 300 mm is used, the number of interposers, which can be formed in a single sheet of the silicon wafer, is smaller than that of a case where the quadrangular substrate of 350 mm×510 mm, thereby increasing a manufacturing cost of the silicon interposer.